C++ Tutorial

In the previous article we just simply configure our machine to run make command.Now we see what the rules to write Makefile and also know how to manipulate things with it. In this article, we also learn how to compile Multiple C/C++ file with Makefile. Before doing any further If you don’t what is Makefile as well as your PC’s don’t have the configuration to run make command then check this article.

So, let’s start guys.

A simple Makefile consists of  rules with the following shape:

target: dependencies
.....: ....

1.A target is usually the name of a file that is generated by a program. Examples of targets are .o extension files(object files) or .exe (executable files). A target can also be the name of an action that we can run with make command, such as “clean” that we see in the previous article.

2. Dependencies are files that are used as input to create the target. A target often depends on several files as well as dependencies.Examples of dependencies:

focus:main.o function.o
 g++ main.o function.o -o sum
main.o:main.c header.h
 gcc -c main.c header.h
function.o:function.c header.h
 gcc -c function.c header.h
 rm *.o *.exe

In the above section, we see that all bolded text are dependencies. From that, we can easily tell that all targets depend on dependencies.

In the first line focus” target depends on “main.o” and “function.o” object files and “main.o” file also depends on “main.c” and “header.h” files. In the same way,  “function.o” file also depends on several files which we see in the above section.

3. A Command is an action that helps Makefile to execute tasks. A Command may have more than one task at a time, either on the same line or each on its own line. You can split a long Command line into two lines using forward slash\” newline.

edit : main.o function.o command.o display.o \
     insert.o search.o files.o split.o
    g++ edit main.o function.o command.o display.o \
        insert.o search.o files.o split.o -o sum

In the above section, we see how to split Command and dependencies using forward slash “\”. We can also say that bolded two line is actually a Command how to link object filesPlease note: you need to put a tab character at the beginning of every Command line.

Till we know the basic structure of a Makefile. Now, we see what the rules to construct a Makefile.

  • first, we have to fix the target as well as it’s dependencies.
  • and if those dependencies also depend on other dependencies, we have to treat them as a target and provide their dependencies on Makefile and So on.
  • when we fix dependencies to a specific target, In the next line, we have to start with pressing tab button and writing our Command with those dependencies to generate the target.
  • we also have such targets and those targets don’t have dependencies.such as “clean“.

Now, Consider we have three c/c++ files and header files for them.we have to write a Makefile for them to compile these files and output as an executable file(.exe file).So, Let’s start.

Assume that, we have a main.c file:


int main() {
  int num1,num2;
  printf("please input the value 1 : ");

  printf("please input the value 2 : ");

  return 0;

Also a function.c file:


int add(int var1,int var2) {
  return var1 + var2;

And also a std.c file:


void print(int num1,int num2)
    printf("sum is %d",add(num1,num2));

Lastly, we have a header file “header.h“:


int add(int var1,int var2) ;
void print(int num1,int num2);

Now, We have to write a Makefile to compile these files and output as an executable file(.exe file). To do that we need some basic knowledge about how a compiler compiles a c/c++ file.

Four Stages of Compiling a C/C++ Program:

  1. Preprocessing
  2. Compilation
  3. Assembly
  4. Linking

1. In the Preprocessing stage, compiler removes Comments, expand Macros as well as included files(#include<stdio.h>). After preprocessing (.i) file extension is produced.

2. In Compilation stage, the preprocessed code is translated to assembly instructions.  After compiling (.s) file extension is produced.

3. During the assembly stage, an assembler is used to translate the assembly instructions to machine code, or object file. After assembly stage (.o) file extension is produced.

4. In the Linking stage, the linker will combine the object files into a single executable file (.exe file).Sometimes linker will combine object files into library file or another object file.

We have learned the four stages of compiling a C/C++ file. In the Makefile, we can write code to produce all four stage’s file. But for better understanding, In our Makefile, we will code to produce two stage’s file. We will just produce object file of each c file and simply link them to produce an executable file (.exe file).

So, Makefile:

target:main.o function.o std.o
	g++ main.o function.o std.o -o sum

main.o:main.c header.h
	gcc -c main.c header.h

function.o:function.c header.h
	gcc -c function.c header.h
std.o:std.c header.h
	gcc -c std.c header.h

	rm *.o *.exe

Don’t forget to save this file as “Makefile” and make sure that this file doesn’t have any file extension.

Now, I am going to tell you what the above code is doing.

In the first line we just simply give a build target with the name “target”.you can give target name whatever you want. Then we write its dependencies(object files) to tell the system that how build target should depend on what object files.

Next line, we press tab button and write the Command to link object files (main.o function.o std.o) as well as to fix output executable file name (sum.exe). Here, g++ is actually a linker which links main.o function.o std.o files.

When Makefile will run for the first time there will be no object files. So, we need to produce object files. In the upcoming lines, we actually telling Makefile how to produce object files.

To do that, we actually consider each object file name as a target and also write its dependencies(c/c++ files and header files) this actually optional. In the next line, we begin with pressing tab button and write Command to compile a .c file into an object file. Here, gcc is actually a compiler which compiles a .c file into an object file or .o file.

We compile our all .c file into object files by giving this command  “gcc -c filename.c header.h …“.

In the last section of the Makefile, we write “clean” target. Whenever we write “make clean” command this actually removes all object files as well as executable files.

Now, Make sure that all .c files and its header, as well as its Makefile, belongs to the same directory.Then in that specific directory run the command prompt and simply write make then your .c files will be compiled and gave output as a sum.exe file.


Makefile output

if you want to remove all object files as well as executable files. Then simply write “make clean” command.


make clean

To run the program just simply write whatever you named to program in following Command “g++ main.o function.o std.o -o sum “.



Thanks for reading.I hope you find this article helpful. For any Information and Suggestion feel free to comment.Thanks.



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